Toffoli / U3 / CZ lowering

oracq.infrastructure.backends.basis

Lower the gate set within OriginIR DEF boundaries; module calls and QRAM declarations remain unexpanded.

oracq.infrastructure.backends.basis.export_toffoli_u3_cz(program)[source]

Export an OriginIR-ext netlist over the Toffoli+U3+CZ gate set.

Equivalent to lower_toffoli_u3_cz(export_originir(program)); module calls and QRAM declarations remain unexpanded.

Parameters:

program – The closed RIR program to compile.

Returns:

The lowered netlist; workspace_qubits includes the newly added pb_work ancilla bit indices.

Return type:

OriginIRArtifact

oracq.infrastructure.backends.basis.lower_toffoli_u3_cz(artifact)[source]

Lower the gates of an OriginIR-ext netlist to Toffoli, U3 and CZ.

Multi-controlled X-type gates (CNOT included, SWAP expanded into three swaps) are implemented with a Toffoli ladder per the mcx recipe, and controlled single-qubit gates per the controlled_u3 recipe; both share the pb_work ancilla pool allocated by the maximum control count; pool bits are appended to QINIT, DEF formals and m_ call lines. DAGGER, QRAM and CREG lines are kept verbatim.

Parameters:

artifact – The OriginIR-ext netlist produced by export_originir.

Returns:

The lowered netlist; workspace_qubits appends the newly added ancilla bit indices, while registers and resources pass through unchanged.

Return type:

OriginIRArtifact

Raises:

ValidationError – A target gate unsupported by the parameter table was encountered.